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march 2011 doc id 13541 rev 5 1/37 37 TDA7491LP 2 x 5-watt dual btl class-d audio amplifier features 5 w + 5 w continuous output power: r l = 8 , thd = 10% at v cc = 9 v 5 w + 5 w continuous output power: r l = 4 , thd = 10% at v cc = 6.6 v wide range single supply operation (5 v - 14 v) high efficiency ( = 90%) four selectable, fixed gain settings of nominally 20 db, 26 db, 30 db and 32 db differential inputs minimize common-mode noise filterless operation no ?pop? at turn-on/off standby and mute features short-circuit protection thermal overload protection externally synchronizable description the TDA7491LP is a dual btl class-d audio amplifier with single power supply designed for lcd tvs and monitors. thanks to the high efficiency and exposed-pad-down (epd) package no separate heatsink is required. furthermore, the filterless operation allows a reduction in the external component count. the TDA7491LP is pin-to-pin compatible with the tda7491p and tda7491hv. powersso-36 with exposed pad down table 1. device summary order code operating temp erature package packaging TDA7491LP -40 to 85 c powersso-36 epd tube TDA7491LP13tr -40 to 85 c powersso-36 epd tape and reel www.st.com
contents TDA7491LP 2/37 doc id 13541 rev 5 contents 1 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 with 4- load at v cc = 6.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 with 8- load at v cc = 9 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 applications circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.2 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3 gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.4 input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.5 internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5.1 master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5.2 slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.6 modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.6.1 reconstruction low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.6.2 filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.7 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.8 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.9 heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.10 test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TDA7491LP contents doc id 13541 rev 5 3/37 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
list of tables TDA7491LP 4/37 doc id 13541 rev 5 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 7. gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 8. how to set up synclk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 9. powersso-36 epd dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
TDA7491LP list of figures doc id 13541 rev 5 5/37 list of figures figure 1. internal block diagram (one channel only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connection (top view, pcb view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 4. thd vs. output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. thd vs. output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. thd vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. fft (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. fft (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6 figure 12. power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13. attenuation vs. voltage on pin mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 14. current consumption vs. voltage on pin stby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 15. attenuation vs. voltage on pin stby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. output power vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. thd vs. output power (1 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. thd vs. output power (100 hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 19. thd vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. crosstalk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. fft (0 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 23. fft (-60 db) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 24. power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 figure 25. power dissipation and efficiency vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. applications circuit for class-d amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 27. standby and mute circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 28. turn-on/off sequence for minimizing speaker ?pop? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 29. device input circuit and frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 30. master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 31. unipolar pwm output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 32. typical lc filter for an 8- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 33. typical lc filter for a 4- speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 34. filterless application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 35. behavior of pin diag for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 36. power derating curves for pcb used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 37. test board (TDA7491LP) layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 38. powersso-36 epd outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
device block diagram TDA7491LP 6/37 doc id 13541 rev 5 1 device block diagram figure 1 shows the block diagram of one of the two identical channels of the TDA7491LP. figure 1. internal block diagram (one channel only)
TDA7491LP pin description doc id 13541 rev 5 7/37 2 pin description 2.1 pin out figure 2. pin connection (top view, pcb view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 sub_gnd outpb outpb pgndb pgndb pvccb pvccb outnb outnb outna outna pvcca pvcca pgnda pgnda outpa outpa pgnd vss svcc vref innb inpb gain1 gain0 diag sgnd vdds synclk rosc inna inpa mute stby vddpw svr ep exposed pad down connect to ground
pin description TDA7491LP 8/37 doc id 13541 rev 5 2.2 pin list table 2. pin description list number name type description 1 sub_gnd power connect to the frame 2,3 outpb out positive pwm output for right channel 4,5 pgndb power power stage ground for right channel 6,7 pvccb power power supply for right channel 8,9 outnb out negative pwm output for right channel 10,11 outna out negative pwm output for left channel 12,13 pvcca power power supply for left channel 14,15 pgnda power power stage ground for left channel 16,17 outpa out positive pwm output for left channel 18 pgnd power power stage ground 19 vddpw out 3.3-v (nominal) regulator output referred to ground for power stage 20 stby input standby mode control 21 mute input mute mode control 22 inpa input positive differential input of left channel 23 inna input negative different ial input of left channel 24 rosc out master oscillator frequency-setting pin 25 synclck in/out clock in/out for external oscillator 26 vdds out 3.3-v (nominal) regulator output referred to ground for signal blocks 27 sgnd power signal ground 28 diag out open-drain diagnostic output 29 svr out supply voltage rejection 30 gain0 input gain setting input 1 31 gain1 input gain setting input 2 32 inpb input positive differential input of right channel 33 innb input negative different ial input of right channel 34 vref out half vdds (nominal) referred to ground 35 svcc power signal power supply 36 vss out 3.3-v (nominal) regulator output referred to power supply -ep - exposed pad for ground-plane heatsink, to be connected to gnd
TDA7491LP electrical specifications doc id 13541 rev 5 9/37 3 electrical specifications 3.1 absolute maximum ratings 3.2 thermal data refer also to section 5.9: heatsink requirements on page 32 . table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 18 v v i voltage limits for input pins stby, mute, inna, inpa, innb, inpb, gain0, gain1 -0.3 to 3.6 v t op operating temperature -40 to 85 c t j operating junction temperature -40 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit r th j-case thermal resistance, junction to case - 2 3 c/w r th j-amb thermal resistance, junction to ambient - 24 -
electrical specifications TDA7491LP 10/37 doc id 13541 rev 5 3.3 electrical specifications unless otherwise stated, the results in ta b l e 5 below are given for the conditions: v cc =9v, r l (load) = 8 , r osc = r3 = 39 k , c8 = 100 nf, f = 1 khz, g v = 20 db, and t amb =25c. table 5. electrical specifications symbol parameter condition min typ max unit v cc supply voltage - 5 - 14 v i q total quiescent current without lc filter - 26 35 ma i qstby quiescent current in standby - - - 10 a v os output offset voltage play mode -100 - 100 mv mute mode -60 - 60 mv i ocp overcurrent protection threshold r l = 0 3--a t j junction temperature at thermal shutdown - - 150 - c r i input resistance differential input 54 68 - k v uvp undervoltage protection threshold - --4.5v r dson power transistor on resistance high side - 0.2 - low side - 0.2 - p o output power thd = 10% - 5.0 - w thd = 1% - 4.0 - p o output power r l = 4 , thd = 10%, v cc =6.6v -5.0- w r l = 4 , thd = 1%, v cc =6.6v -4.0- p d dissipated power p o = 5 w + 5 w, thd = 10% -1.0-w efficiency p o = 5 w + 5 w, r l = 8 , thd = 10%, v cc =9v -90-% thd total harmonic distortion p o = 1 w - 0.1 - % g v closed loop gain gain0 = l, gain1 = l 18 20 22 db gain0 = l, gain1 = h 24 26 28 gain0 = h, gain1 = l 28 30 32 gain0 = h, gain1 = h 30 32 34 g v gain matching - -1 - 1 db ct crosstalk f = 1 khz, p o = 1 w - 70 - db en total input noise a curve, g v = 20 db - 15 - v f = 22 hz to 22 khz - 20 -
TDA7491LP electrical specifications doc id 13541 rev 5 11/37 svrr supply voltage rejection ratio fr = 100 hz, vr = 1 vpp, c svr = 10 f -50-db t r , t f rise and fall times - - 40 - ns f sw switching frequency internal oscillator, master mode 290 320 350 khz f swr switching frequency range (1) 250 - 400 khz v inh digital input high (h) - 2.3 - - v v inl digital input low (l) - - 0.8 a mute mute attenuation v mute = low, v stby = high -80-db function mode standby, mute and play modes v stby < 0.5 v v mute = x standby - v stby > 2.9 v v mute < 0.8 v mute - v stby > 2.9 v v mute > 2.9 v play - 1. refer to section 5.5: internal and external clocks on page 27 . table 5. electrical specifications (continued) symbol parameter condition min typ max unit
characterization curves TDA7491LP 12/37 doc id 13541 rev 5 4 characterization curves the following characterization curves were made using the TDA7491LP demo board. the lc filter for the 4- load uses components of 15 h and 470 nf and that for the 8- load uses 33 h and 220 nf. 4.1 with 4- load at v cc = 6.6 v figure 3. output power vs. supply voltage figure 4. thd vs. output power (1 khz) thd =1% thd =10% test condition : vcc = 5~6.6v rl = 4 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, ta m b =2 5 c specification limit: typical: vs =6.6v, rl = 4 ohm po =5w @thd =10% po =3.7w @thd =1% 0 1 2 3 4 5 6 5 5. 4 5. 8 6. 2 6. 6 po (w) su pply volt a ge (v) test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, ta m b =2 5 c specification limit: typical: po =5w @ thd =10% po per ch a nnel (w) thd( % )
TDA7491LP characterization curves doc id 13541 rev 5 13/37 figure 5. thd vs. output power (100 hz) figure 6. thd vs. frequency test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f =100hz, gv =30db, ta m b =2 5 c specification limit: typical: po =5w @ thd =10% thd( % ) po per ch a nnel (w) test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w ta m b =2 5 c specification limit: typical: thd<0.5% thd( % ) fre qu ency (hz)
characterization curves TDA7491LP 14/37 doc id 13541 rev 5 figure 7. frequency response figure 8. crosstalk vs. frequency specification limit: max: +/-3db @20hz to 20khz test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w tamb =25c cin = 1uf amplit u de (db) fre qu ency (hz) specification limit: typical: >50db (@ f =1khz) test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f = 1khz, gv=30db, po=1w ta m b =2 5 c cro ss t a lk (db) fre qu ency (hz)
TDA7491LP characterization curves doc id 13541 rev 5 15/37 figure 9. fft (0 db) figure 10. fft (-60 db) specification limit: typical: >60db for the harmonic frequency test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f = 1khz, gv =30db, po =1w ta m b =2 5 c fft (db) fre qu ency (hz) fft (0 db) specification limit: typical: > 90db for the harmonic frequency test condition: vcc =6.6v, rl= 4 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po = -60db (@ 1w =0db) tamb =25c fft (db) fft (-60 db) fre qu ency (hz)
characterization curves TDA7491LP 16/37 doc id 13541 rev 5 figure 11. power supply rejection ratio vs. frequency figure 12. power dissipation and efficiency vs. output power test condition : vcc = 6.6v, rl = 4 ohm, rosc =39k , cosc =100nf, vin=0, gv =30db, tamb =25c vr = 500mvrms fr = 100hz fre qu ency (hz) p s rr (db) test condition : vcc = 6.6v, rl = 4 ohm, rosc =39k , cosc =100nf, gv =30db, tamb =25c 0 10 20 30 40 50 60 70 80 90 012345 0 0. 2 0. 4 0. 6 0. 8 1 1. 2 1. 4 1. 6 1. 8 2 po per ch a nnel (w) efficiency ( % ) pd (w)
TDA7491LP characterization curves doc id 13541 rev 5 17/37 figure 13. attenuation vs. voltage on pin mute figure 14. current consumption vs. voltage on pin stby test condition : vcc = 6.6v, rl = 4 ohm, rosc =39k , cosc =100nf, f=1khz, 0db@f=1khz, po=1w, gv =30db, ta m b =2 5 c -80 -75 -70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 0 0.5 1 1.5 2 2.5 3 3.5 vmute (v) attenuation (db) test condition : vcc = 6.6v, rl = 4 ohm, rosc =39k , cosc =100nf, vin=0, gv =30db, ta m b =2 5 c 0 0. 005 0. 01 0. 015 0. 02 0. 025 0 0.5 1 1.5 2 2.5 3 3.5 v s t b y (v) i q (a)
characterization curves TDA7491LP 18/37 doc id 13541 rev 5 figure 15. attenuation vs. voltage on pin stby test condition : vcc = 6.6v, rl = 4 ohm, rosc =39k , cosc =100nf, f=1khz, 0db@f=1khz, po=1w, gv =30db, tamb =25c -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 v s t b y (v) atten ua tion (db)
TDA7491LP characterization curves doc id 13541 rev 5 19/37 4.2 with 8- load at v cc = 9 v figure 16. output power vs. supply voltage figure 17. thd vs. output power (1 khz) 0 0. 5 1 1. 5 2 2. 5 3 3. 5 4 4. 5 5 5. 5 6 56789 thd =1% thd =10% rl =8 ohm f =1khz test condition : vcc = 5~9v, rl = 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, tamb =25c specification limit: typical: vs =9v,rl = 8 ohm po =5w @thd =10% po =4w @thd =1% su pply volt a ge (v) o u tp u t power (w) thd (%) output power (w) 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 6 200m 300m 400m 600m 800m 1 2 3 4 5 test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, tamb =25c specification limit: typical: po =5w @ thd =10%
characterization curves TDA7491LP 20/37 doc id 13541 rev 5 figure 18. thd vs. output power (100 hz) figure 19. thd vs. frequency thd (%) output power (w) 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 100m 6 200m 300m 400m 600m 800m 1 2 3 4 5 test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f =100hz, gv =30db, ta m b =2 5 c specification limit: typical: po =5w @ thd =10% frequency (hz) thd (%) 0.005 1 0.01 0.02 0.05 0.1 0.2 0.5 20 20k 50 100 200 500 1k 2k 5k 10k test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w tamb =25c specification limit: typical: thd<0.5%
TDA7491LP characterization curves doc id 13541 rev 5 21/37 figure 20. frequency response figure 21. crosstalk vs. frequency ampl (db) frequency (hz) -5 +2 -4 -3 -2 -1 -0 +1 10 30k 20 50 100 200 500 1k 2k 5k 10k specification limit: max: +/-3db @20hz to 20khz test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po =1w tamb =25c frequency (hz) crosstalk (db) -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 20 20k 50 100 200 500 1k 2k 5k 10k specification limit: typical: >50db (@ f =1khz) test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f = 1khz, gv=30db, po=1w ta m b =2 5 c
characterization curves TDA7491LP 22/37 doc id 13541 rev 5 figure 22. fft (0 db) figure 23. fft (-60 db) frequency (hz) fft (db) -150 +10 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 20 20k 50 100 200 500 1k 2k 5k 10k specification limit: typical: >60db for the harmonic frequency test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f = 1khz, gv =30db, po =1w ta m b =2 5 c fft (0 db) frequency (hz) fft (db) -150 +0 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 20 20k 50 100 200 500 1k 2k 5k 10k specification limit: typical: > 90db for the harmonic frequency test condition: vcc =9v, rl= 8 ohm, rosc =39k , cosc =100nf, f =1khz, gv =30db, po = -60db (@ 1w =0db) ta m b =2 5 c fft (-60 db)
TDA7491LP characterization curves doc id 13541 rev 5 23/37 figure 24. power supply rejection ratio vs. frequency figure 25. power dissipation and efficiency vs. output power ripple frequency=100hz ripple voltage=500mv test condition : vcc = 9v, rl = 8 ohm, rosc =39k , cosc =100nf, vin=0, gv =30db, tamb =25c 0 10 20 30 40 50 60 70 80 90 012345 0 0. 5 1 1. 5 2 2. 5 vcc=9v rload=8ohm gain=30db f=1khz test condition : vcc = 9v, rl = 8 ohm, rosc =39k , cosc =100nf, vin=0, gv =30db, t a m b =25c o u tp u t power per ch a nnel (w) efficiency ( % ) power di ss ip a tion (w)
applications information TDA7491LP 24/37 doc id 13541 rev 5 5 applications information 5.1 applications circuit figure 26. applications circuit for class-d amplifier ,1/ ,1/ ,15 ,15 9&& *1' 287/ 287/ 2875 2875 7'$3/3+9&/$66'$03/,),(5 /&),/7(5&20321(17 /rdg //// && rkp rkp rkp x+ x+ x+ q) q) q) 087( 67%< 932:(56833/< rkp x+ q) )ru 6lqjoh(qghg ,qsxw )ru 6lqjoh(qghg ,qsxw 9 & & & & x) 9 & q) 5 . / x+ & q) & q) & q) & q) & q) & q) & q) & s) 5 5 / x+ & q) & q) / x+ & s) 5 5 / x+ & q) & q) & q) & q) & q) & q) ,13% 966 2871% 3*1'% 39&&% 2873% 2871$ 39&&$ 3*1'$ 2873$ ,11% 2871% 3*1'% 087( 39&&% 2873% 695 2871$ 68%b*1' ,13$ ,11$ 6*1' 9''6 ',$* 9''3: 3*1' 67%< 526& *$,1 69&& *$,1 6<1&/. 2873$ 3*1'$ 95() 39&&$ ,& 7'$ 5 n 5 5 & q) 5 n 5 n 5 n & q) & q) & q) - - 6 6 & q) & x) *1' 287 ,1 ,& /&= /&= /&= /&= & x) 9 - - - - - - & x) 9 & x) 9 & x) 9 5 n ',$* 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9''6 9''6 9&& 6*1' 6*1' 6*1' 6*1' 6*1' 6*1' 9 9 6*1' 6*1' 6*1' 6*1' 6*1' 6<1&/. TDA7491LP
TDA7491LP applications information doc id 13541 rev 5 25/37 5.2 mode selection the three operating modes, defined below, of the TDA7491LP are set by the two inputs stby (pin 20) and mute (pin 21) as shown in ta b l e 6 . standby mode: all circuits are turned off, very low current consumption. mute mode: inputs are connected to ground and the positive and negative pwm outputs are at 50% duty cycle. play mode: the amplifiers are active. the protection functions of th e TDA7491LP are impl emented by pulling down the voltages of the stby and mute inputs shown in figure 27 . the input current of the corresponding pins must be limited to 200 a. figure 27. standby and mute circuits figure 28. turn-on/off sequence for minimizing speaker ?pop? table 6. mode settings mode voltage level on pin stby voltage level on pin mute standby l (1) 1. refer to v stby and v mute in table 5: electrical specifications on page 10 for the drive levels for l and h x (don?t care) mute h (1) l play h h stby mute 0 v 3.3 v c7 2.2 f r2 30 k standby 0 v 3.3 v c15 2.2 f r4 30 k mute TDA7491LP
applications information TDA7491LP 26/37 doc id 13541 rev 5 5.3 gain setting the gain of the TDA7491LP is set by the two inputs, gain0 (pin 30) and gain1 (pin 31). internally, the gain is set by changing the feedback resistors of the amplifier. 5.4 input resistance and capacitance the input impedance is set by an internal resistor ri = 68 k (typical). an input capacitor (ci) is required to couple the ac input signal. the equivalent circuit and frequency response of the input components are shown in figure 29 . for ci = 220 nf the high-pass filter cut-off frequency is below 20 hz: fc = 1 / (2 * * ri * ci) figure 29. device input circuit and frequency response table 7. gain settings voltage level on pin gain0 voltage level on pin gain1 nominal gain, g v (db) l (1) 1. refer to v inl and v inh in table 5: electrical specifications on page 10 for the drive levels for l and h h (1) 20 lh26 hl 30 hh32 ri input ci rf input pin signal
TDA7491LP applications information doc id 13541 rev 5 27/37 5.5 internal and external clocks the clock of the class-d amplifier can be generated internally or can be driven by an external source. if two or more class-d amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. this can be implemented by using one TDA7491LP as master clock, while the other devices are in slave mode, that is, externally clocked. the clock interconnect is via pin synclk of each device. as explained below, synclk is an output in master mode and an input in slave mode. 5.5.1 master mode (internal clock) using the internal oscillator, th e output switching frequency, f sw , is controlled by the resistor, r osc , connected to pin rosc: f sw = 10 6 / ((16 * r osc + 182) * 4) khz where r osc is in k . in master mode, pin synclk is used as a clock output pin, whose frequency is: f synclk = 2 * f sw for master mode to operate correctly then resistor r osc must be less than 60 k as given below in ta b l e 8 . 5.5.2 slave mode (external clock) in order to accept an external clock input, pin rosc must be left open, that is, floating. this forces pin synclk to be internally configured as an input as given in ta bl e 8 . the output switching frequency of the slave devices is: f sw = f synclk / 2 figure 30. master and slave connection table 8. how to set up synclk mode rosc synclk master r osc < 60 k output slave floating (not connected) input synclk rosc rosc cosc rosc synclk 39 k 100 nf output input master slave TDA7491LP TDA7491LP
applications information TDA7491LP 28/37 doc id 13541 rev 5 5.6 modulation the output modulation scheme of the btl is called unipolar pulse width modulation (pwm). the differential output voltages change between 0 v and +v cc and between 0 v and -v cc . this is in contrast to the traditional bipolar pwm outputs which change between +v cc and -v cc . an advantage of this scheme is that it effectively doubles the switching frequency of the differential output waveform on the load then reducing the current ripple accordingly. the outp and outn are in the same phase almost overlapped when the input is zero under this condition, then the switching current is low and the relat ed losses in the load are low. in practice, a short delay is introduced between these two outputs in order to avoid the btl outputs switching simultaneously when the input is zero. figure 31 shows the resulting differential output voltage and current when a positive, zero and negative input signal is applied. the resulting differential voltage on the load has a double frequency with respect to outputs outp and outn then resulting in reduced current ripple. figure 31. unipolar pwm output inp inn outp outn differential out
TDA7491LP applications information doc id 13541 rev 5 29/37 5.6.1 reconstruction low-pass filter standard applications use a low-pass filter before the speaker. the cut-off frequency should be higher than 22 khz and much lower than the output switching frequency. it is necessary to choose the l-c component values depending on the loud speaker impedance. some typical values, which give a cut-off frequency of 27 khz, are shown in figure 32 and figure 33 below. figure 32. typical lc filter for an 8- speaker figure 33. typical lc filter for a 4- speaker 5.6.2 filterless modulation TDA7491LP can be used without a filter at the ic outputs, because the frequency of the TDA7491LP output is beyond the audio frequency, the audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. the reconstruction of the audio signal on the load is usually achieved using a complete lc filter (such as a butterworth) solution that guarantees good audio performance, high efficiency and emi suppression. the lc co mponent values should be computed by considering the target audio band and the pwm switching frequency. the cut-off frequency must lie well below the switching frequency and above the upper audio frequency. in particular, the following schematic gives a guideline for a cut-off frequency of about 30 khz for both 6- and 8- speakers. thanks to its advanced modulation approach, aimed to improve both driving efficiency and radiating emissions, the device is even able to drive a load with a very low component count. with this cost-saving filtering scheme the tda7491p complies with the emi specifications fcc class b. figure 34 on page 30 shows the simplified schematic adopted for the test and the relevant emission curve at full output power.
applications information TDA7491LP 30/37 doc id 13541 rev 5 emission tests have been performed with a 1-m length of twisted speaker wire with ferrite beads. changing the type of the ferrite bead requires care due to factors such as its effectiveness in the emc frequency range a nd impedance stability ov er the rated current range. an output snubber network further improves the emissions and this should be tuned according to the actual pcb, layout and component characteristics. figure 34. filterless application schematic am045140v1
TDA7491LP applications information doc id 13541 rev 5 31/37 5.7 protection functions the TDA7491LP is fully protected against undervoltages, overcurrents and thermal overloads as explained here. undervoltage protection (uvp) if the supply voltage drops below the value of v uvp given in table 5: electrical specifications on page 10 the undervoltage protection is activated which forces the outputs to the high-impedance state. when the supply voltage recovers the device restarts. overcurrent protection (ocp) if the output current exceeds the value of i ocp given in table 5: electrical specifications on page 10 the overcurrent protection is activa ted which forces the outputs to the high-impedance state. periodically, the device attempts to restart. if the overcurrent condition is still present then the ocp remains active. the restart time, t oc , is determined by the r-c components connected to pin stby. thermal protection (otp) if the junction temperature, t j , reaches 145 c (nominal), the device goes to mute mode and the positive and negative pwm outputs are forced to 50% duty cycle. if the junction temperature reaches the value for tj given in table 5: electrical specifications on page 10 the device shuts down and the output is forced to the high impedance state. when the device cools sufficiently the device restarts. 5.8 diagnostic output the output pin diag is an open drain transistor. when the protection is activated it is in the high-impedance state. the pin can be connected to a power supply (<18 v) by a pull-up resistor whose value is limited by the maximum sinking current (200 a) of the pin. figure 35. behavior of pin diag for various protection conditions TDA7491LP protection logic r1 diag vdd vdd overcurrent protection restart restart uv, ot protection
applications information TDA7491LP 32/37 doc id 13541 rev 5 5.9 heatsink requirements due to the high efficiency of the class-d amplifier a 2-layer pcb can easily provide the heatsinking capability for low to medium power outputs. using such a pcb with a copper ground layer of 3 x 3 cm 2 and 16 vias connecting it to the contact area for the exposed pad, a thermal resistance, junction to ambient (in natural air convection), of 24 c/w can be achieved. the dissipated power within the device depends primarily on the supply voltage, load impedance and output modulation level. with the TDA7491LP driving 2 x8 with a supply of 9 v then the maximum device dissipation is approximately 1 w. when this power is dissipated at the maximum ambient temperature of 85 c and the device is mounted on the above pcb then the junction temperature could reach: tj = tamb + pd * rj-amb = 85 + 1 * 24 = 109 c however, this temperature is sufficiently low to avoid triggering thermal warning. with a musical program the dissipated power is about 40% less than the above maximum value. this leads to a junction temperature of around only 99 c with the 9 cm2 copper ground. a commensurately smaller heatsink can thus be used. figure 36 shows the power derating curve for the powersso-36 package on pcbs with copper areas of 2 x 2 cm 2 and 3 x 3 cm 2 . figure 36. power derating curves for pcb used as heatsink 0 1 2 3 4 5 6 7 8 0 20 40 60 80 100 120 140 160 g pd (w) tamb ( c) copper area 2x2 cm and via holes tda7491p psso36 copper area 3x3 cm and via holes TDA7491LP powersso-36
TDA7491LP applications information doc id 13541 rev 5 33/37 5.10 test board figure 37. test board (TDA7491LP) layout
package mechanical data TDA7491LP 34/37 doc id 13541 rev 5 6 package mechanical data the TDA7491LP comes in a 36-pin powersso package with exposed pad down (epd). figure 38 below shows the package outline and ta bl e 9 gives the dimensions. in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 9. powersso-36 epd dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.47 0.085 - 0.097 a2 2.15 - 2.40 0.085 - 0.094 a1 0.00 - 0.10 0.000 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 6.50 - 7.10 0.256 - 0.280
TDA7491LP package mechanical data doc id 13541 rev 5 35/37 figure 38. powersso-36 epd outline drawing h x 45
revision history TDA7491LP 36/37 doc id 13541 rev 5 7 revision history table 10. document revision history date revision changes 02-jul-2007 1 initial release. 15-oct-2008 2 updated characterization curves. 23-jun-2009 3 updated text concerning oscillator r and c in section 3.3: electrical specifications on page 10 updated condition for iq test, added v uvp maximum value, updated thd maximum value, updated stby and mute voltages in table 5: electrical specifications on page 10 updated equation for f sw on page 11 and on page 27 updated figure 26: applications circuit for class-d amplifier on page 24 updated section 5.7: protection functions on page 31 . 04-sep-2009 4 added text for exposed pad in figure 2 on page 7 added text for exposed pad in table 2 on page 8 updated exposed pad y (min) dimension in table 9 on page 34 updated supply voltage for pin diag pull-up resistor in section 5.8 on page 31 . 23-mar-2011 5 updated operating temperature range in table 1 on page 1 modified description of pins 10, 11 in table 2 on page 8 added v i and updated operating temperature range in ta bl e 3 : absolute maximum ratings on page 9 updated table 4: thermal data on page 9 updated table 5: electrical specifications on page 10 updated introduction and characterization curves in section 4 on page 12 moved test board layout to section 5.10 on page 33 moved package mechanical data to section 6 on page 34 updated applications circuit in figure 26 on page 24 updated table 7: gain settings on page 26 updated section 5.6: modulation on page 28 added figure 34: filterless application schematic on page 30 removed overvoltage protection from section 5.7: protection functions on page 31 updated section 5.9: heatsink requirements on page 32 updated exposed pad dimension y in table 9 on page 34
TDA7491LP doc id 13541 rev 5 37/37 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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